Ph3Overview /h3pPrincipal Analog Design Engineer — Pavia, Italy /ppSalary: €85,000 to €110,000 + Bonus + Signing Bonus + Paid Relocation /ppThis role is a key position within our Optical PHY (CE-OPHY) team, which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency. /ph3Responsibilities /h3ullibDesign Architecture: /b Analyze and interpret block specifications, take ownership of transistor-level design, and select the most appropriate topologies. Design entire analog macros or IPs from initial concept to final mass production. /lilibVerification Validation: /b Model and validate circuit blocks. Supervise and guide layout activities, provide clear guidelines, and conduct rigorous post-layout verifications to ensure design integrity. /lilibCollaboration Leadership: /b Work closely with other engineering teams to enhance existing solutions and participate in cross-functional meetings. Train and mentor junior designers to build the team\'s collective expertise and technical strength. /lilibProject Management: /b Manage pre-silicon tasks (simulation and modeling) and post-silicon tasks (lab characterization, debugging, correlating measurements to simulations) through to high-volume production. /li /ulh3Candidate Profile /h3pWe are seeking a seasoned engineer with a deep background in analog IC design and a passion for pushing technological limits. /pullibEducation Experience: /b A Master\'s degree or Ph.D. in Electrical Engineering or a related field is required, with 12-15 years of professional experience. /lilibTechnical Skills: /b Proven experience in designing ICs from architecture definition through lab characterization and volume production. Strong background in analog design (multi-GHz range), supervision of custom analog layout using standard EDA CAD tools, and debugging designs to correlate simulations with measurements. /lilibPreferred Qualifications: /b Experience with multi-Gbps electrical SerDes or electro-optical transceivers. Knowledge of advanced CMOS nodes, including FinFET, is advantageous. /lilibPersonal Skills: /b Strong communication, presentation, and documentation skills. Proficiency in Italian and English (minimum B2) required due to international team and location. /lilibWork Model: /b On-site, full-time position located in Pavia, Italy. /li /ul /p #J-18808-Ljbffr