Mems analog mixed signal verification sr/team leader

Ph3Experteer Overview /h3pIn this role you will drive mixed-signal verification for ASICs within the MEMS sGROUP, contributing across the full verification flow from specification to product industrialization. You will work with cross-functional teams to apply cutting-edge verification methodologies at subsystem and SoC levels, shaping robust analog and mixed-signal designs. The position offers exposure to advanced tools, Cadence environments, and diverse projects that advance ST's smart, greener technology. You will thrive by solving complex verification challenges and delivering reliable results that support product readiness. /ph3Retribuzione / Benefits /h3ulliDefinition and development of verification test benches /liliDevelopment of verification components and test cases for simulation /liliDebugging failures and creating simulation scenarios for various studies /liliWork with advanced verification methodologies at subsystem and SoC levels /li /ulh3Responsabilità /h3ulliKnowledge of analog custom circuits (e.g., ADCs, DACs, comparators) /liliExperience with analog, digital and mixed-signal simulation environments /liliBugs analysis and reporting and analog SystemVerilog Assertions /liliModeling languages such as SystemVerilog, Verilog-AMS; analog model definition and validation /liliCoverage concepts and digital logic basics /liliScripting languages (Python) /liliUPF for mixed-signal simulations (plus) /liliSystemVerilog and UVM knowledge (plus) /liliCadence-based tools and environments (plus) /liliCommunication protocols in mixed simulations (I2C, SPI, I3C) /liliFormal tools for top-level connectivity /liliVersion control systems /liliFluent English and strong team collaboration /li /ulh3Requisiti fondamentali /h3 /p #J-18808-Ljbffr