OverviewASIC Design Engineer, Cloud-Scale Machine Learning Acceleration teamCustom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.About AWS and the organization:Utility Computing (UC) provides product innovations—from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to continuously released new product innovations that set AWS's services apart. Annapurna Labs designs silicon and software that accelerates innovation for AWS UC. AWS is the world's most comprehensive cloud platform, trusted by customers from startups to Global 500 companies.Key responsibilitiesIntegrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routingAs a key member of the ASIC design team, implement and deliver high performance, area- and power-efficient RTL to meet design targets and specificationsAnalyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirementsDevelop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing-clean designs with constraintsPerform lint and clock domain crossing quality checks on the designCollaborate with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to complete tasksYou will thrive in this role if youAre familiar with scripting in PythonAre proficient with assertionsHave good debugging skills to analyze RTL test failuresHave a "Learn and Be Curious" mindsetBasic QualificationsBS degree in electrical engineering or equivalent3+ years in RTL design for SOC3+ years of VLSI engineering3+ years with code quality tools including: Spyglass, LINT, or CDCPreferred QualificationsExperience scripting for automation (e.g., Python, Perl, Ruby)Experience with microarchitecture, SystemVerilog RTL, Assertions, SDC constraintsFamiliarity with data path design, interconnects, AXI protocolGood analytical, problem solving, and communication skillsEqual Opportunity and Additional InformationAmazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.Los Angeles County applicants: job duties, safety expectations, and compliance with laws and policies apply. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider qualified applicants with arrest and conviction records.Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $129,800/year to $212,800/year, with variation based on location, knowledge, skills and experience. Amazon is a total compensation company; depending on the position, equity, sign-on payments, and other benefits may be provided. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site.PostedUpdated dates are listed on the original posting.
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