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Senior/junior testing engineer (roma)

Roma
Fondazione Chips-IT
Ingegnere di validazione
Pubblicato il Pubblicato 5h fa
Descrizione

Role\nThe Chips-IT Foundation is seeking seeking Junior Researchers to contribute to cutting-edge research and development initiatives centered on digital design and RISC-V architectures. The project focuses on developing advanced digital processors, accelerators, and custom So Cs based on the RISC-V instruction set architecture (ISA) as well as dedicated accelerators.\nThis role will involve participating in the design, optimization, and verification of high-performance, low-power digital systems for applications in next-generation computing platforms, Io T, and embedded systems. Junior Researchers will have the opportunity to learn and apply novel design methodologies, verification techniques, and hardware-software co-design strategies to support innovation in the RISC-V ecosystem.

The work can be carried out either in Pavia or in Bologna.

Key Responsibilities:\nSupport research and development activities related to digital designs, including processors, accelerators, and So Cs based on the RISC-V architecture.\nAssist in the design, implementation, and verification of digital building blocks (Processors, Accelerators, Memory and Communication Subsystems, etc.) for high-performance, low-power systems.\nCollaborate with senior team members and contribute to technical discussions, design reviews, and documentation.\nParticipate in integration and testing phases on FPGA or silicon platforms.\n(Optional) Contribute to dissemination activities including technical reports, academic publications, or conference presentations.\nRequired Qualifications:\nMaster’s degree (or close to completion) in Electrical Engineering, Computer Engineering, or a related field with a focus on digital design and processor architectures (Mandatory).\nFundamental knowledge of hardware description languages (HDL) such as Verilog or VHDL, and digital design tools for synthesis, simulation, and verification (Mandatory).\nBasic familiarity with RISC-V architecture and interest in custom extensions or hardware-software co-design.\nUnderstanding of FPGA-based prototyping and exposure to ASIC design flows.\nEagerness to learn and grow in the fields of digital design and processor architecture.\nGood analytical, problem-solving, and communication skills.\nTeam spirit and motivation to contribute to innovative research and collaborative projects.\nWhat we offer\nCompetitive compensation and contract type, to be negotiated based on qualifications and experience\nLunch tickets\nPrivate health care coverage depending on your role and contract\nStructured growth path, with ongoing access to training and updates\nNetworking opportunities with industry-leading professionals\nInternational environment\nHybrid work policy\nTax deductions: Candidates from abroad, comprising Italian citizens, who have carried scientific research activity abroad and meet specific requirements, may be entitled to a taxable income deduction up to 90% for a period of 6 to 13 years\nAbout Fondazione Chips-IT\nThe Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.\nThe Foundation is Italy's first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.

Missions of the Foundation:\npromote the design and development of integrated circuits\nstrengthen the system of professional training in the field of microelectronics\nensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology transfer in the field\nDisclaimer

No ranking list or list of suitable candidates will be prepared and published.\nThe Foundation reserves the right to:\na. extend or reopen the deadline of this notice;\nb. revoke this notice;\nc. not make any selection from among the applications submitted if they are deemed not to meet the functions set forth in the notice;\nwithout any claims or rights being asserted by the interested parties.

Non verrà redatta e pubblicata alcuna graduatoria o elenco degli idonei.

La Fondazione si riserva la facoltà di:

a. prorogare o riaprire il termine di scadenza del presente avviso;

b. revocare il presente avviso;

c. non procedere ad alcuna scelta tra le candidature presentate, ove ritenute non rispondenti alle funzioni di cui all’avviso;

senza che gli interessati possano avanzare alcuna pretesa o diritto.

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