Overview
Experteer OverviewIn this role within the Central Engineering - Optical PHY team, you design circuits for high-speed optical transceivers used in data centers and telecom networks. You'll work with deep submicron processes and co-operate with cross-functional teams to advance next-gen transceiver tech. Expect to own analog macro/IP design, oversee layout and post-layout verification, and mentor junior designers. This position offers impact through shaping high-performance, scalable communication solutions in a collaborative, innovation-driven environment. Join Marvell to contribute to industry-leading optical technologies at scale.
Responsibilities
* Analyze block specifications and select suitable topologies
* Design analog blocks at transistor level
* Supervise layout activities and conduct post-layout verifications
* Model blocks and validate models
* Collaborate with other teams to enhance solutions
* Take responsibility for designing entire analog macros or IPs
* Participate in cross-functional meetings and interact with other functions
* Train and mentor junior designers
Qualifications
* Master\'s degree in Electrical Engineering (specialization in Microelectronics) or PhD in Electrical Engineering (specialization in microelectronics)
* 1–3 years of relevant work experience (or 2+ years for PhD path)
* Proven experience in independently designing ICs from architecture to lab characterization with full macro/IP ownership
* Solid proficiency in analog design in the multi-GHz range
* Experience in analog custom layout supervision
* Strong familiarity xivgfpx with EDA CAD tools
* Expertise in IC performance measurement and correlating simulations to real measurements
* Direct project experience in Multi-Gbps electrical SerDes or electro-optical transceivers OR advanced CMOS nodes including FinFETs
* Strong communication, presentation, and documentation skills
* Proficiency in Italian and English (B2 minimum)
Benefits
* competitive compensation
* great benefits
* inclusive work environment
* growth and development opportunities
#J-18808-Ljbffr