Experteer Overview
As a Digital Verification Engineer, you will verify ASIC designs for MEMS in a cross‑functional MEMS team. You will drive verification work from specification through to product industrialization, shaping testbenches, verification components, and DSP/digital control models. You’ll develop and execute simulation scenarios, debug issues, and ensure robust coverage and automation. This role sits at the intersection of innovation and reliability within a leading semiconductor company recognised for its inclusive culture and global impact.
Retribuzione / Benefits
- define and develop verification testbenches
- create and maintain verification components
- develop DSP models and digital control logic
- write test cases for simulation and guideline‑driven scenarios
- debug failures and create comprehensive simulation cases
- participate in the full ASIC verification process from spec to industrialization
Responsabilità
- expertise in digital verification testbenches using UVM and SystemVerilog
- proficiency in SystemVerilog and digital simulator tools
- strong knowledge of UVM, SystemVerilog Assertions, coverage, and self‑checking/testbench automation
- experience in bug analysis and reporting
- basic knowledge of Python and TCL scripts, and version control
- good communication, English fluency, and team collaboration
