Principal Digital Design Verification Engineer - CMOS Image Sensors / UVM / Python / Perl
* Do you have solid experience in the design and verification domain, preferably with CMOS Image Sensors?
* Excellent expertise in UVM/digital verification methodology?
* Want to work in beautiful northern Italy?
If so, then this could be the one for you!
We are seeking a Principal Digital Design Verification Engineer to join a globally known tech company's Design Centre in Trento in Italy on a permanent basis.
As a Principal Digital Design Verification Engineer, you will lead Digital Design Verification projects, including planning and organizing work for contributors, and reporting the progress to managers and you will develop and consolidate new design verification flows, with the main target of developing state-of-the-art methodology and step up the efficiency across sites (amongst numerous other tasks)
The role offers Hybrid working (up to 40% home office), pays a very competitive base salary, plus bonus, and an extensive benefits package.
Please note, this role requires you to be a commutable distance from the office in Trento so kindly only apply if you are able to agree to this.
We are also not able to consider applicants requiring a visa sponsor for Italy.
If you do not possess the Right to Work in Italy, your application will not be processed.
What do we look for?
* A background in technical, electronics, semiconductor, or physics, with a PhD/MSc in Engineering or Physics or equivalent experience.
* Solid experience in the design and verification domain, preferably with CMOS Image Sensors.
* Excellent expertise in UVM/digital verification methodology.
* Proficient in common scripting languages (Python, Perl, Tcl/shell, Makefile, etc.).
* Excellent communication and coordination skills.
If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on
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