OUR STORY
At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today. You will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.
YOUR ROLE
Position: Digital Verification Engineer – focus on digital verification of ASICs. Preferred seniority: 3 to 5 years of experience. The candidate will be part of the digital verification team of MEMS.SGROUP and will follow the entire ASIC verification process from specification definition to final product industrialization.
Responsibilities
* Define and develop verification testbench.
* Develop verification components and digital control logic.
* Develop DSP models and test cases for simulation.
* Debug failures and create simulation cases for varied scenarios.
Qualifications & Skills
* Background in digital verification testbench using Universal Verification Methodology (UVM) and SystemVerilog.
* Experience with SystemVerilog assertions, coverage, self‑checking capabilities, and testbench automation.
* Experience with digital simulator tools.
* Knowledge of Python scripts, TCL scripts, and version control systems.
* Knowledge of formal verification and communication protocols (I2C, SPI, I3C) is a plus.
* Good communication skills, fluent English, and strong team collaboration across the MEMS.SGROUP Design team.
* Preferred 3 to 5 years of professional experience.
Benefits & Culture
ST is recognized as a 2025 Global Top Employer and is proud to promote a diverse and inclusive workplace. We do not tolerate discrimination and strive for equity in career development, opportunities, and remuneration. Diversity, equity, and inclusion (DEI) are woven into our company culture.
To discover more, visit st.com/careers.
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