Design layout engineer

Ph3Role Overview /h3pAs a Layout Design Engineer at Micron Semiconductor Italia, you will play a critical role in the physical implementation of advanced NAND Flash products, working across analog, custom digital, and mixed‑signal circuits. Beyond traditional layout excellence, this role places strong emphasis on automation, AI‑assisted methodologies, and data‑driven layout optimization, which are central to Micron’s future design strategy. You will actively contribute to evolving the layout field from manual execution toward scalable, high‑productivity, and intelligent build approaches. /ph3Responsibilities /h3ulliDesign and implement complex analog, mixed‑signal, and custom digital layout blocks (e.g., charge pumps, regulators, oscillators, IO, sensors). /liliPerform layout integration activities including floorplanning, placement, routing, and parasitic‑aware optimization. /liliSupport design validation through parasitic extraction, simulation correlation, silicon learning, and tape‑out revisions. /liliCollaborate with multi‑functional teams (build, CAD, modeling, product engineering) to ensure manufacturability, quality, and performance targets. /liliDevelop and drive automation and AI‑assisted layout methodologies (e.g., parameterized layout, scripting, data‑driven optimization). /liliContribute to methodology improvement and user documentation. /li /ulh3Minimum Qualifications /h3ulliB.S. in Electrical Engineering, Electronics, data science, or a related field, with equivalent experience considered. /liliHands‑on experience with layout and verification tools (e.g., Cadence Virtuoso, Calibre LVS/DRC). /liliUnderstanding of advanced layout techniques (matching, shielding, EM, ESD, latch‑up, HV design constraints). /liliExperience with AI‑assisted design methodologies or data‑driven optimization approaches. /liliStrong problem‑solving and communication skills, with the ability to work in multi‑functional environments. /li /ulh3Preferred Qualifications /h3ulliExperience in NAND Flash or other non‑volatile memory technologies. /liliFamiliarity with scripting and automation (e.g., Python) applied to layout or design flows. /liliExperience collaborating on silicon validation, bring‑up, or yield improvement activities. /li /ulh3Salary Benefits /h3pThe base salary range for this position full‑time is 29.000,00 € – 48.000,00 € per year, with B1 CCNL Level. The compensation package also includes eligibility for a variable plan subject to personal achievement of objectives and the company’s performance, as well as benefits such as meal vouchers, corporate welfare, yearly allowance of remote working days, supplementary health insurance, life coverage, and Employee Assistance Program. /ph3Equal Opportunity Employment /h3pAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. /ppRemuneration is determined by objective criteria, regardless of gender and of any other factor protected by applicable federal, state, or local laws. /p /p #J-18808-Ljbffr