The FPGA Design/verification Engineer will be responsible for the VHDL development and verification within the framework of a satellite equipment or a scientific instrument, in accordance to customer requirements and applicable standards.
Responsibilities
* Definition of the requirements and specifications of the FPGA in close cooperation with the System Engineer
* Development of the HDL design for space application
* Verification of your companion FPGA Design Engineers design in a simulation environment
* Conduct synthesis and layout activities for various types of FPGA devices (including static & dynamic timing and design rule checks).
* Perform debug activities on the actual hardware.
* Support the system functional and performance test campaign (up to engineering model level)
* Provide documentation of the developed HDL in accordance with ECSS standard
* Take part in Design Reviews with customer
Technical Skills, Qualifications and Professional Experience
* Qualification: Master degree in Electronic Engineer, Physic, Math or Information Technology
* Knowledge of hardware description language: VHDL, SystemVerilog, Verilog,
* Knowledge of digital simulator: ModelSim, QuestaSim, Incisive NCSIM
* Knowledge of Synthesis and fitting tools: Synplify, Vivado
* Knowledge of FPGA technology: Xilinx and Microchip
* Knowledge of script and programming software: tcl, C/C++, Phython
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