Ph3Senior DFT Engineer at Axelera AI /h3 pAxelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. /p pIn just four years, we have raised a total of $120 million and have built a world‑class team of 220+ employees, including 49+ PhDs with more than 40,000 citations, both remotely from 17 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands. We have also launched our Metis™ AI Platform, which achieves a 3‑5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million. Our unwavering commitment to innovation has firmly established us as a global industry pioneer. /p h3Position Overview /h3 pWe are looking for a Senior DFT Engineer to join our multicore in‑memory‑compute SoC team. You will design, implement, and validate test solutions for our complex SoCs, collaborating with a talented team of engineers across Europe. This is your chance to work on cutting‑edge architectures, improve silicon testability, and make a real impact in a fast‑moving startup environment. /p h3Key Responsibilities /h3 ul liImplement scan insertion, ATPG, Memory BIST, JTAG/IJTAG, and fault simulation flows. /li liCollaborate with RTL, verification, and physical design teams to integrate DFT solutions efficiently. /li liSupport silicon bring‑up and debug, helping to optimize test coverage and yield. /li liContribute to methodology improvements and share best practices with team members. /li /ul h3Qualifications /h3 ul liMinimum of 5 years in DFT engineering, preferably with complex SoC projects. /li liExperience with SystemVerilog RTL, TCL, Python, Unix/Linux workflows. /li liCore knowledge of hierarchical scan, ATPG, Memory BIST, JTAG/IJTAG, fault simulation, silicon debug, gate‑level verification. /li liTool experience with Siemens, Synopsys, or Cadence DFT tools. /li liBonus: Familiarity with IEEE 1149.x / 1500 / 1687 standards, synthesis flow, timing analysis. /li liStrong problem‑solving skills, collaboration, and passion for semiconductor innovation. /li /ul h3Location /h3 ul liWork from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you’re already based in the vicinity. /li liWork fully remotely from any European country (incl. the UK) you are already in. /li liRelocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven). /li /ul pPriority will be given to candidates who are based in Belgium or Italy. /p h3Seniority level /h3 pMid‑Senior level /p h3Employment type /h3 pFull‑time /p h3Job function /h3 pEngineering and Information Technology /p h3Industries /h3 pSemiconductor Manufacturing /p pAt Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI. /p /p #J-18808-Ljbffr