OverviewSTMicroelectronics is a global semiconductor company that uses technology to drive innovation and impact people, businesses, and society. Our technologies and chips form the foundation of today’s world. We are a diverse organization with more than 115 nationalities, present in 40 countries, and over 50,000 creators and makers of technology worldwide. We value collaboration, respect, passion, and the drive to disrupt the status quo to unlock potential. We aim to innovate for a smarter, greener future in a responsible and sustainable way.The role focuses on the design of innovative IPs (mainly ADCs and DACs) and participation in architecture definition and implementation inside MEMS products. The ideal candidate is a brilliant mixed signal design engineer who can propose ideas and design solutions for innovative IPs in inertial MEMS.ResponsibilitiesThe activities center on system-level implementation with strong interaction across departments. The candidate will cooperate with the system architect to develop IPs that meet target performance, including system modeling, transistor-level IP implementation, and all simulation/verification activities. The role involves working closely with the layout engineer to drive the layout of designed IPs and to verify layout impact with post-layout simulations. The candidate will participate in evaluation and characterization of the blocks within products to verify functionality and performance. Technical skills and a communicative attitude are essential.Qualifications & ExperienceMaster’s degree in electronic engineering.At least 3 years’ experience in analog electronics design with familiarity of industrialization processes and debug/characterization activities.Good knowledge of low power and low noise design techniques. Experience in ADCs and DACs is a strong plus.Knowledge of signal processing is a plus, as well as knowledge of digital hardware languages (VHDL / Verilog).Good knowledge of Spice-based tools and mixed-signal simulation environments.Good knowledge of analog blocks modeling (Verilog-A / SystemVerilog real number).System-level oriented block implementation approach is a key skill.MEMS knowledge is a plus.Diversity & InclusionST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction. We strive for diversity, equity, and inclusion (DEI) in our workplace and aim to recruit and retain a diverse workforce that reflects the societies around us. We encourage candidates who may not meet every single requirement to apply, as we value diverse perspectives and provide opportunities for growth and learning. DEI is woven into our company culture.To discover more, visit st.com/careers.
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