Overview Principal Digital Design Verification Engineer - CMOS Image Sensors / UVM / Python / Perl About the role We are seeking a Principal Digital Design Verification Engineer to join a globally known tech company's Design Centre in Trento in Italy on a permanent basis. Responsibilities Lead Digital Design Verification projects, including planning and organizing work for contributors, and reporting progress to managers. Develop and consolidate new design verification flows with the main target of developing state-of-the-art methodology and increasing efficiency across sites. Qualifications A background in technical, electronics, semiconductor, or physics, with a PhD / MSc in Engineering or Physics or equivalent experience. Solid experience in the design and verification domain, preferably with CMOS Image Sensors. Excellent expertise in UVM / digital verification methodology. Proficient in common scripting languages (Python, Perl, Tcl / shell, Makefile, etc.). Excellent communication and coordination skills. Location & Working Arrangements The role offers Hybrid working (up to 40% home office) with a very competitive base salary, plus bonus, and extensive benefits. Please note, this role requires you to be a commutable distance from the office in Trento so kindly only apply if you are able to agree to this. We are not able to consider applicants requiring a visa sponsor for Italy. If you do not possess the Right to Work in Italy, your application will not be processed. How to apply If this sounds interesting and you\'d like to learn more, click the link below to apply or email me with a copy of your CV on Privacy notice By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice ( J-18808-Ljbffr J-18808-Ljbffr