PstrongFPGA Signal Processing Engineer (MATLAB to HDL Conversion) /strong /ppstrongLocation:br / Pisa, Italy /strong /ppstrongStart Date:br / /strong ASAP /ppbr / /ppstrongOverview /strong /ppWe're looking for a Signal Processing Engineer with strong FPGA experience to port advanced algorithms from MATLAB into deployable, hardware-optimized FPGA implementations on Xilinx RFSoC platforms. /ppbr / /ppstrongKey Responsibilities /strong /pulliAnalyze and optimize signal processing algorithms currently developed in MATLAB. /liliPort and implement these algorithms in HDL (VHDL/Verilog) suitable for FPGA deployment. /liliCollaborate with software, systems, and FPGA developers to ensure correct functional behavior and integration. /liliValidate implementations through simulation and on-board testing. /li /ulpbr / /ppstrongRequired Skills /strong /pulliStrong background in strongdigital signal processing (DSP) /strong. /liliExperience porting algorithms from strongMATLAB/Simulink to HDL /strong. /liliProficiency in strongHDL (VHDL or Verilog) /strong and strongXilinx FPGA development (Vivado) /strong. /liliFamiliarity with fixed-point arithmetic and hardware optimization techniques. /liliUnderstanding of FPGA resource constraints and timing closure. /li /ulpbr / /ppstrongDesirable /strong /pulliPrior use of strongRFSoC /strong or strongZynq Ultrascale+ /strong platforms. /liliExperience with strongSimulink HDL Coder /strong or other model-based hardware design tools. /liliKnowledge of Petalinux or embedded systems. /li /ul