PFPGA Signal Processing Engineer (MATLAB to HDL Conversion) /ppLocation: Pisa, Italy /ppStart Date: ASAP /ppOverview /ppWe're looking for a Signal Processing Engineer with strong FPGA experience to port advanced algorithms from MATLAB into deployable, hardware-optimized FPGA implementations on Xilinx RFSoC platforms. /ppKey Responsibilities /pulliAnalyze and optimize signal processing algorithms currently developed in MATLAB. /liliPort and implement these algorithms in HDL (VHDL/Verilog) suitable for FPGA deployment. /liliCollaborate with software, systems, and FPGA developers to ensure correct functional behavior and integration. /liliValidate implementations through simulation and on-board testing. /li /ulpRequired Skills /pulliStrong background in digital signal processing (DSP). /liliExperience porting algorithms from MATLAB/Simulink to HDL. /liliProficiency in HDL (VHDL or Verilog) and Xilinx FPGA development (Vivado). /liliFamiliarity with fixed-point arithmetic and hardware optimization techniques. /liliUnderstanding of FPGA resource constraints and timing closure. /li /ulpDesirable /pulliPrior use of RFSoC or Zynq Ultrascale+ platforms. /liliExperience with Simulink HDL Coder or other model-based hardware design tools. /liliKnowledge of Petalinux or embedded systems. /li /ul