Ph3Job Responsibilities /h3 ul liArchitect, model, and define sub‑system specifications for advanced power management solutions, including DC‑DC converters (inductive and capacitive), LDOs, shunt regulators, and multi‑rail PMIC architectures. /li liTranslate system‑level specifications into elegant, robust, and cost‑effective silicon solutions; lead end‑to‑end design of power management circuits, including high‑current power stages and advanced packaging‑aware design, loop stability, transient performance, and efficiency optimization. /li liDefine architecture and provide detailed design specifications to global teams; lead and mentor junior design engineers. /li liDevelop system and behavioral models (MATLAB/Simulink, Verilog‑A/AMS) to validate architecture, loop stability, and system performance. /li liDrive and participate in critical design reviews and ensure design quality, robustness, and manufacturability. /li liServe as the PMIC technical lead and primary interface to Tier‑1 customers, driving technical discussions and alignment. /li liCollaborate cross‑functionally with system, layout, product, test, packaging, and quality teams to ensure successful product execution. /li liProvide technical leadership for innovation strategy, including proposing and reviewing long‑term road‑map and new architectures. /li liDrive differentiated innovation and contribute to patentable solutions for next‑generation power management products. /li /ul h3Job Qualifications /h3 ul liMS in Electrical Engineering with 12+ years of experience, or PhD with 10+ years of experience in power management IC development. /li liProven expertise in power conversion topologies: Buck, boost, buck‑boost, charge pumps, LDOs, and multi‑phase architectures. /li liStrong understanding of control techniques: Current‑mode, voltage‑mode, hysteretic control, and loop compensation. /li liDeep experience in high‑current power stage design, including advanced packaging and parasitic‑aware design. /li liExpertise in power integrity modeling and analysis (frequency/time domain), simulation optimization, and silicon correlation. /li liStrong foundation in analog design, control theory, and device physics. /li liDemonstrated ability to develop novel architectures and drive innovation, including patent generation. /li liHands‑on experience with Cadence IC design tools (Virtuoso, Spectre) and modeling environments (MATLAB/Simulink). /li liProven track record of delivering products from concept to high‑volume manufacturing. /li liExcellent communication skills and experience working with global cross‑functional teams and Tier‑1 customers. /li /ul pEqual Opportunity/Affirmative Action Employer. NXP is an Equal Opportunity/affirmative action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. /p /p #J-18808-Ljbffr